Re: 4-4-4-12 latencys on GA-P35-DS3R
DDR2 timings/subtimings in Bios are set as following:
CAS Latency Time_______________ 4
Dram RAS# to CAS# Delay________ 4
Dram RAS# Precharge Delay_______ 4
Precharge Delay (tRAS)___________ 12
ACT to ACT Delay (tRRD)_________ 3
Rank Write to READ Delay________ 11
Write to Precharge Delay_________ 6 (i got this wrong in my previous post)
Refresh to ACT Delay____________ 32
Read to Precharge Delay_________ 3
Static tRead Value______________ 10
Static tRead Phase Adjust________ auto
and MemSet reports them as in the attached picture
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