[Lsdmeasap]

First off, sorry man I have been so busy I have yet to have time add in things we have discussed. But I have been writing them up and collecting other info and doing some in depth reading about skew control as well. I will get it done trust me.

Sorry I forgot to add a similar note to tWR that I added to tWTR, they both will always be different then set in the BIOS, I will add the other note in. I think it is by 8-9+ depending for tWR. The thing I guess I need to also address is between chipsets sometimes tWTR needs to be set to whatever in the BIOS that equals 11-12 in Memset, which is often 4-5. tWR is a bit different on how things should be set depending on a few other factors and what things are set on.

When you say crash vista when trying "Recommended" settings, who's recommended settings are you referring to?

Yes, tRD is the single most thing that affects Memory Bandwidth that is why it is often called the Performance Level.

As for your crashing, what settings in the BIOS did you have that make 800 crash on you? If it was tRD of 6 then that is likely the setting that caused it, it may have worked for you at 2.4 multi because of a strap being used or not.

I guess I would need a better table of what you used at each to understand, you saying things about the SPD have me unclear what you used even with your table. Since the SPD is not used in Intel boards fully, nor does the SPD contain all settings info I am not sure if you chose SPD from memset or what you were seeing in AUTO on the left in the BIOS (Which would be incorrect, often change, and ONLY be used at that specific time in the BIOS)

Yes AUTO does try to read SPD info in a Intel Board and sometimes gets part of it correct. Intel has been working on getting this better like Nvidia Chipsets EPP and how they read them. They have implemented XMP, which is similar.

SPD is programmed in memory to go above JEDEC standards and is made to be read by EPP programming, which is why AUTO often in not correct it getting these settings