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Thread: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request




  1. #11
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Thanks, Janus.

    I can asure you that many gigabyte users here in Portugal want to know the voltages too.

  2. #12
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Thank you, but sorry I may need time ^^.

  3. #13
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Thanks Janus! I know you are probably Very Busy. Time isnt such a big deal, getting it done is.

    So Please Make sure they Do this (If you can) and THANKS

  4. #14
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Dear Lsdmeasap

    finally i get the answer, we will do it in P45 MB.

  5. #15
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Ahhh, well that is no good for P35 Motherboard users! Thanks for getting them to answer you though, it is much needed info!


    I had thought of buying a x38-48 I guess I should wait, so when is P45 expected to be released?

  6. #16

    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    How about at least knowing the default volt values for the P-35 motherboards or does that vary?

  7. #17
    Lsdmeasap's Avatar
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    I have found this >>>>>>

    .P35 MCH datasheet:

    Power and Grounds
    Name Voltage Description
    VCC 1.25 V Core Power <----------- default MCH voltage
    VTT 1.05V/1.2 V Processor System Bus Power <----------- default FSB voltage
    VCC_EXP 1.25 V PCI Express* and DMI Power <----------- default PCI-e voltage
    VCC_DDR 1.8V/1.5V DDR2/DDR3 System Memory Power <----------- default memory voltage
    VCC_CKDDR 1.8V/1.5V DDR2/DDR3 System Clock Memory Power
    VCC3_3 3.3 V 3.3 V CMOS Power
    VCCAPLL_EXP 1.25 V PCI Express PLL Analog Power
    VCCA_DPLLA 1.25 V Display PLL A Analog Power.
    VCCA_DPLLB 1.25 V Display PLL B Analog Power.
    VCCA_HPLL 1.25 V Host PLL Analog Power
    VCCA_MPL 1.25 V System Memory PLL Analog Power
    VCCA_DAC 3.3 V Display DAC Analog Power
    VCCD_CRT 1.5/1.8 V Display Digital Supply Power
    VCCDQ_CRT 1.5/1.8V CRTDAC Power
    VCC_CL 1.25 V Controller Link Aux Power
    VSS 0 V Ground
    §

    The FSB voltage is a bit trickier, per Intel specs:

    GTL+ Gunning Transceiver Logic signaling technology. Implements a voltage level as
    defined by VTT of 1.2 V.

    and you need to read this to understand what is really going on,
    Adjusting A/GTL+ Levels for Increased FSB Signaling Margins and Overclocking - The Tech Repository Forums

    and so who knows what the manuf has done, Typically you dont want to mess with this unless as a last resort, it causes more harm than good and you probally would only then want to increase it one bump in value.


    Technicls specs for Intel chipsets are found, wait for it, wait... wait...
    on Intel.com.
    But yes, at better answer from GA would be more helpful

  8. #18
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Thanks Lsdmeasap. You are (by far) more helpful than Gigabyte .

    If you visit Portugal, iŽll buy you a drink

  9. #19
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    Default Re: PCI Latency Timer (CLK) Clock Settings + MCH/NB Voltage Values Request

    Now just remeber, those are the intel specs. That does not mean GA followed them to the letter, but probably pretty close.

    Hey, I'd take you up on that too!

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