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Thread: GA-790FXTA-UD5 and ECC RAM

  1. #1
    Join Date
    Jan 2010

    Default GA-790FXTA-UD5 and ECC RAM

    I'm considering replacing my "Asus M4A79T Deluxe" with a "GA-790FXTA-UD5". The only advantage I can see that my Asus board has is its support of ECC RAM. At the Gigabyte product spec page:
    GIGABYTE - Product - Motherboard - Specification - GA-790FXTA-UD5 (rev. 1.0)
    It merely states that GA-790FXTA-UD5 has "Support for ECC memory modules". Can anyone elaborate on what kind of support it has? For example I assume the ECC is active (and protecting me from single bit errors)? Are these corrected errors reported up to the OS? Does it do background scrubbing of memory? Are there plans to release an updated BIOS which allows more control of ECC settings? Below are the BIOS settings that Asus allows me to control, any change Gigabyte will match this level of control?

    • ECC Mode [Disabled]
    • DRAM ECC Enable [Disabled]
    • DRAM SCRUB REDIRECT [Disabled]
    • 4-Bit ECC Mode [Disabled]
    • DRAM BG Scrub [Disabled]
    • Data Cache BG Scrub [Disabled]
    • L2 Cache BG Scrub [Disabled]
    • L3 Cache BG Scrub [Disabled]

  2. #2
    Join Date
    Jan 2010

    Default Re: GA-790FXTA-UD5 and ECC RAM

    I took a chance and bought this MB hoping that it provides good ECC support. My gamble paid off, I have the ECC options below to configure:
    • DRAM ECC enable
    • DRAM MCE enable
    • Chip-Killl mode enable
    • DRAM ECC Redirection
    • DRAM background scrubber
    • L2 cache background scrubber
    • DCache background scrubber

    I've got most of em figured out except for "DRAM MCE enable". Is that enabling Machine Check Exception logs to be generated whenever an ECC error is found?

  3. #3
    Join Date
    Jan 2010

    Default ECC RAM settings defined

    I think I've answered my own question fairly accurately. Below is my list of definitions for these ECC settings. For more info on my ECC settings see my blog post I wrote about it.

    • DRAM ECC enable = Correct/detect errors before they're given to CPU
    • DRAM MCE enable = Generate Machine Check Exception logs
    • Chip-Killl mode enable = Can correct some multibit errors
    • DRAM ECC Redirection = When a single bit ECC error is found write the corrected data back to RAM (i.e. scrub just the location with the ECC error)
    • DRAM background scrubber = Interval between main memory scrubs (64 bytes)
    • L2 cache background scrubber = Interval between main L2 cache scrubs (one single L2 cache line tag address)
    • DCache background scrubber = Interval between data cache scrubs (64 bits)

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